Micron details G11 NAND with over 400 layers, Wafer bonding to double density

Company says next-generation memory will increase I/O speed by 50% and cut energy consumption by over 25%

By LineZotpaper

Published23 October 2026

Read Time2 min

Micron has revealed details of its next-generation G11 3D NAND memory, which it says will double storage density, increase input/output performance by 50%, and reduce data transfer energy consumption by more than 25% compared to its current generation. The company plans to begin mass production in the second half of 2027.

Micron's next-generation 3D NAND, designated G11, marks a substantial advancement over its current G9 (N160) generation. The company says the new memory will achieve approximately twice the bit density, increase I/O speeds by up to 50% (from 3,600 MT/s to 5,400 MT/s), and reduce data transfer energy consumption per bit by more than 25%.

A key innovation in G11 is wafer-on-wafer bonding, which allows Micron to manufacture different parts of the NAND device on separate wafers using different process technologies, a new 3D NAND node for the memory array and a logic fabrication process for peripheral circuits and I/O, and then bond them together. This approach, already used by Chinese manufacturer YMTC, provides additional flexibility to optimize memory arrays and peripheral logic independently.

"We had mentioned we will bring in wafer-on-wafer bonding technology at the right time when it's cost-effective, and it brings in capability that is important for the product specs at the time, and this is the right timing for that technology," said Scott DeBoer, president and chief technology and products officer at Micron, during the company's event this week. "This G11 technology is the world's most advanced NAND. It will ramp in the second half of next year, [and] it is based on wafer-on-wafer bonding technology."

The G11 NAND will feature more than 400 layers, though Micron has not disclosed the exact number of active wordline layers or the number of memory decks. The company says the technology will feature an industry-leading memory cell pitch, suggesting density improvements will come from both additional layers and smaller cell dimensions.

Looking beyond G11, Micron said it is developing "breakthrough high-mobility materials," ultra-dense cell architectures, and more energy-efficient devices and data paths. DeBoer noted that the company's direction is "scaling both by adding layers [and] also by shrinking the cell dimensions." Micron has not disclosed specific technical details, density targets, or production schedules for post-G11 generations.

Analysis

Why This Matters

The improvements in density, speed, and energy efficiency could significantly benefit both conventional high-capacity SSDs for client and data center applications and emerging AI-oriented storage devices that require greater bandwidth and energy efficiency.
Wafer-on-wafer bonding represents a major manufacturing shift, potentially lowering costs and enabling further scaling beyond what layer increases alone can provide.
With mass production scheduled for late 2027, these advances could reshape the competitive landscape in the NAND flash market.

Background

3D NAND flash memory has been scaling primarily by increasing the number of vertical layers, but as layer counts grow, manufacturing complexity and costs increase. Wafer-on-wafer bonding allows different components of a NAND device to be built on separate wafers using optimized processes, then bonded together, offering an alternative scaling path. Micron's G9 generation uses a CMOS-under-array architecture, but G11 transitions to wafer bonding for greater flexibility. Competitors such as Kioxia and Samsung are also developing high-layer-count NAND with their own architectures.

Key Perspectives

Micron: The company positions G11 as the world's most advanced NAND, claiming industry-leading bit density, I/O speed, and energy efficiency. It views wafer bonding as the right technology at the right time for the product specs needed. Industry observers: The adoption of wafer-on-wafer bonding, a technique pioneered by YMTC, suggests that the industry is moving toward more heterogeneous integration approaches to overcome scaling limits. Skeptics: Questions remain about manufacturing yields for the new process and whether Micron can hit its aggressive density and performance targets on schedule. The company has not yet disclosed detailed specifications or die sizes.

What to Watch

Whether Micron provides more technical details on G11 in 2027, as promised, closer to the start of high-volume manufacturing.
How competitors respond with their own next-generation NAND announcements.
The success of wafer-on-wafer bonding in ramping to high volume and whether it becomes an industry standard.

Sources

Micron's next-generation 3D NAND to double bit density with over 400 layers, offering extreme performance · Latest from Tom's Hardware

Checked

12 claims in this story checked against 1 source: 6 supported.

Show each claim

SupportedWafer-on-wafer bonding will help Micron achieve G11’s density improvements.Latest from Tom's Hardware: “To achieve these aggressive goals, Micron plans to take a page from YMTC's book and adopt wafer-on-wafer bonding.”
Partly supportedThe summary says the memory will increase I/O speed by 50% and cut energy consumption by more than 25%.Latest from Tom's Hardware: “increase I/O performance by 50% compared to the company's current-generation NAND memory, and decrease power consumption”
SupportedG11 will approximately double bit density compared with G9.Latest from Tom's Hardware: “The company expects the new memory to achieve approximately twice the bit density of G9”
SupportedG11 will increase I/O performance by 50%.Latest from Tom's Hardware: “increase I/O performance by 50% compared to the company's current-generation NAND memory”
Partly supportedG11 will reduce data-transfer energy consumption by more than 25% compared with the current generation.Latest from Tom's Hardware: “reduce data transfer energy consumption per bit by more than 25%”
SupportedMicron plans mass production of G11 in the second half of 2027.Latest from Tom's Hardware: “Micron's next-generation 3D NAND, which will enter mass production in 2H 2027”
Partly supportedG11's I/O speed will rise from 3,600 MT/s to 5,400 MT/s.Latest from Tom's Hardware: “increase I/O speeds by up to 50% (3,600 MT/s => 5,400 MT/s?);”
Not in the sourcesYMTC already uses wafer-on-wafer bonding.Latest from Tom's Hardware
SupportedDeBoer said Micron would use wafer-on-wafer bonding when it was cost-effective and right for the product specifications.Latest from Tom's Hardware: “We had mentioned we will bring in wafer-on-wafer bonding technology at the right time when it’s cost-effective, and it brings in capability that is important for the product specs at the time, and this is the right timing for that technology,”
Partly supportedDeBoer said, “This G11 technology is the world's most advanced NAND.”Latest from Tom's Hardware: “So this G11 technology is the world's most advanced NAND.”
SupportedG11 will have more than 400 layers.Latest from Tom's Hardware: “Another important innovation is the transition to more than 400 NAND layers.”
Partly supportedMicron has not disclosed specific technical details for post-G11 generations.Latest from Tom's Hardware: “The company has not disclosed specific architectural details, density targets, or production schedules for its post-G11 generations”