AMD on Tuesday launched its sixth-generation EPYC 9006 'Venice' server processors, built on the new Zen 6 architecture with up to 256 cores per socket, PCIe Gen6 support, and a bumped 5.3 GHz peak clock speed for the high-frequency 96-core EPYC 9686F.
The launch marks the first public evaluation of both the Zen 6 microarchitecture and the new SP7 platform, which ServeTheHome describes as the EPYC line's most ambitious innovation since the switch to an I/O die with the EPYC 7002 series.
Venice uses TSMC's N2 (2nm) process node, the foundry's first gate-all-around (GAAFET) node. The lineup includes several families for different workloads, including the high-cache 'Venice-X' parts and the LPDDR5X-based Verano platform.
According to reports from tech site ServeTheHome, which published benchmarking results, the flagship EPYC 9996 offers 256 cores and 512 threads, with a 600W TDP. The high-frequency EPYC 9686F has been upgraded from a previously announced 5.0 GHz to 5.3 GHz, which AMD said was possible because the final silicon outperformed expectations.
Other SKUs range from the 64-core EPYC 9556 at 300W to the 256-core EPYC 9996 at 600W. The 9686F's clock bump applies only to the 96-core part; the 64-core EPYC 9586F remains at 5.0 GHz.
The platform supports up to 16 channels of DDR5-8000 memory or MRDIMM-12800, up to 8 TB of memory capacity, and 96 lanes of PCIe 6.0. AMD says Venice offers up to 33% more cores than the previous-generation EPYC 9005 'Turin' chips, plus 20% higher IPC and higher clockspeeds.
AMD's server CPU revenue share has reportedly reached 46% in the x86 market, and the company expects Venice to help push it above 50% for the first time. Its data center division projects its revenues will surpass Intel's in Q4 of this year.
Analysis
Why This Matters
- AMD's shift to 2nm and PCIe Gen6 sets a new high-water mark for server CPU performance, directly affecting cloud providers and AI infrastructure operators
- The 256-core single-socket capability could reshape server density and total cost of ownership for hyperscale data centers
- AMD's revenue share approaching parity with Intel in the server market signals a fundamental shift in the x86 CPU landscape
Background
AMD's EPYC line has been on a biennial CPU development cadence. The EPYC 9006 series is the sixth generation of Zen-architecture server chips, following Genoa (Zen 4) in 2022 and Turin (Zen 5) in 2024. The company has increasingly focused on AI workloads, with Venice designed to serve both host nodes and agentic AI workloads. AMD acquired a software engineering firm in recent months to develop software that replaces DRAM with flash memory.
Key Perspectives
AMD: Describes Venice as 'the most ambitious innovation in the EPYC line since the switch to an I/O die,' and expects the platform to help it capture leadership of the server CPU market within 12 months.
ServeTheHome: Reported that AMD's data center division is already projecting that data center revenues will surpass Intel's in Q4 of this year, and that AMD is at 46% of x86 server CPU revenue share.
What to Watch
- Whether AMD can deliver the broader SP8 platform launching early next year as planned
- How Intel responds with its own server CPU roadmap, particularly the upcoming Granite Rapids and Sierra Forest parts
- The adoption rate of PCIe Gen6 in server infrastructure over the next 12 months
Checked
12 claims in this story checked against 1 source: 10 supported.
Show each claim
- SupportedAMD launched EPYC 9006 Venice processors with up to 256 cores per socket.ServeTheHome: “The headline feature is that we now get up to 256 cores per socket”
- SupportedVenice uses Zen 6 architecture and TSMC’s 2nm process.ServeTheHome: “AMD is now relying on advanced packaging techniques to tie them all together. This has allowed AMD to fully leverage TSMC’s N2 (2nm) process node”
- SupportedThe high-frequency 96-core EPYC 9686F has a peak clock speed of 5.3 GHz.ServeTheHome: “the 9686F is now a 5.3GHz chip.”
- Not in the sourcesAMD launched the processors on Tuesday.ServeTheHome: “Today, we finally get to share with you our first look at AMD’s EPYC “Venice” series, or the EPYC 9006 processors.”
- SupportedVenice supports PCIe Gen6.ServeTheHome: “The headline feature is that we now get up to 256 cores per socket, a new PCIe Gen6 I/O subsystem”
- Partly supportedThe launch is the first public evaluation of both the Zen 6 microarchitecture and the SP7 platform.ServeTheHome: “today also marks our first chance to evaluate the Zen 6 CPU architecture”
- SupportedServeTheHome describes Venice as the EPYC line’s most ambitious innovation since the switch to an I/O die with EPYC 7002.ServeTheHome: “is by far the most ambitious innovation in the EPYC line since the switch to an I/O die, which allowed the EPYC 7002 to deliver a knockout .”
- SupportedThe EPYC 9996 has 256 cores, 512 threads and a 600W TDP.ServeTheHome: “AMD EPYC 9996 256 512 4.1 GHz 2.55 GHz 1024 MB 600W”
- SupportedAMD attributed the 9686F’s increase from 5.0 GHz to 5.3 GHz to final silicon performing better than expected.ServeTheHome: “the final silicon for their big Zen 6 CCD has turned out even better than the company was expecting.”
- SupportedAMD’s x86 server CPU revenue share is 46%.ServeTheHome: “AMD is already at 46% of the revenue share for the x86 server CPU market”
- SupportedAMD expects Venice to help push its x86 server CPU revenue share above 50% for the first time.ServeTheHome: “the company seems confident that Venice will help push them above 50% for the very first time.”
- SupportedAMD’s data center division projects its revenues will surpass Intel’s in Q4 of this year.ServeTheHome: “the company’s data center division is already projecting that its revenues will surpass Intel’s in Q4 of this year.”