Intel shared deeper architectural insights into its Crescent Island AI accelerator at the Hot Chips 2026 symposium, revealing a chip designed to carve out a low-power, inference-first niche in a market dominated by Nvidia's Rubin and AMD's MI455X GPUs. Unlike those high-power, liquid-cooled competitors, Crescent Island is a 350-watt air-cooled PCIe card using up to 480 GB of LPDDR5X memory, allowing deployment in standard servers without exotic infrastructure.
The chip is built from four Xe3P slices, each containing eight Xe Cores for a total of 32. Each Xe Core includes eight Xe Vector Engines and eight XMX matrix accelerators, yielding 256 of each resource. Intel disclosed that the Xe3P architecture features twice the general register file space for working data compared to the previous Battlemage generation, with each Xe Core now offering 1 MB of register file space, up from 512 KB. Additionally, Xe3P provides 512 KB of L1 cache or shared local memory per core—up from 256 KB on Battlemage—and a shared 32 MB L2 cache.
Key to its inference performance, Xe3P's XMX engines employ a significantly deeper systolic design: a 16-deep structure compared to the 4-deep design of Xe2 and Xe3. This allows the chip to process matrices in much larger chunks during general matrix-multiply operations, potentially boosting FLOPS per watt for inference workloads.
Meanwhile, Microsoft took the stage to detail its second-generation Maia 200 AI accelerator, a custom server-side inference chip. While specific architectural parameters were scarce, the presentation confirmed Microsoft's continued commitment to in-house silicon for its Azure cloud services, going beyond merely deploying third-party GPUs.
The dual announcements at Hot Chips underscore a broader industry pivot: the market may be saturating with ultra-high-end training hardware, but the inference stage—where models are deployed for real-world use—remains fragmented and hungry for efficiency. Intel and Microsoft are betting on lower-power, purpose-built designs to win in that segment.