The MaixStation is built on a 16-core Arm Cortex-A55 CPU and features an in-house NPU rated at 256 TOPS at FP4 without sparsity, produced on a 6nm process. It includes 128GB of LPDDR5X memory on a 256-bit bus delivering 273 GB/s of bandwidth, matching the DGX Spark's memory subsystem. Sipeed claims the MaixStation achieves 25% faster prefill and 30% faster decode than the DGX Spark when running the Qwen 27B language model from a single node, though the company noted that in controlled tests with FP4 and speculative decoding off, the lead was about 10% on both metrics.
Sipeed also previewed a MaixStation Pro model with 512GB memory. The standard model supports up to eight nodes via a 256 Gbps chip-to-chip link (expandable to 384 Gbps) and includes a 10G SFP+ port. On the software side, the system runs Debian 13 and promises support for vLLM, SGLang, and PyTorch. The NPU toolchain is expected by the end of October, with shipments to begin within three months after the Kickstarter campaign closes.
The announcement positions Sipeed as a new entrant in the desktop AI compute market, challenging established players with a competitive price and Arm-based architecture.